Location: Bengaluru
Firm: Synopsys
On this position, you’ll be chargeable for:
- Design and improvement of Transistor degree analog and blended sign format.
- Machine/block degree floorplan, placement, routing, and bodily verification.
- Troubleshoot Bodily verification points to get clear and desired outcomes.
- In control of creating and reviewing format paperwork to make sure they meet high quality requirements and are delivered on time.
Job Necessities
- Candidate should have a bachelor’s or grasp’s diploma and a minimal 3 years of expertise in Analog and Combined Sign Circuit Structure.
- Expertise in Analog Structure Movement from Machine placement until GDS launch.
- In-depth data in semiconductor gadget physics, analog circuits (diff amp, present mirrors, regulators,…)
- Good data on CMOS, and FINFET applied sciences.
- Information of CMOS Fabrication expertise, deep sub-micron results and its affect on format.
- Information on EMIR, ESD,LUP, Cross discuss, Shielding and its affect on design.
- Arms on data in EDA instruments for Customized Combined sign format flows.
- Passionate to be taught and discover new format strategies.
- Have to be self-directed, detail-oriented with good problem-solving expertise and communication expertise.
- Expertise in Tcl is a plus.